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? semiconductor components industries, llc, 2016 august, 2016 ? rev. 4 1 publication order number: ax ? sfeu/d ax-sfeu, ax-sfeu-api ultra-low power, at command / api controlled, sigfox compliant transceiver ic for up-link and down-link overview circuit description ax ? sfeu and ax ? sfeu ? api are ultra ? low power single chip solutions for a node on the sigfox network with both up ? and down ? link functionality. the ax ? sfeu chip is delivered fully ready for operation and contains all the necessary firmware to transmit and receive data from the sigfox network in europe. it connects to the customer product using a logic level rs232 uar t. at commands are used to send frames and configure radio parameters. the ax ? sfeu ? api variant is intended for customers wishing to write their own application software based on the ax ? sf ? lib ? 1 ? gevk library. features functionality and ecosystem ? sigfox up ? link and down ? link functionality controlled by at commands or api ? the ax ? sfeu and ax ? sf ? api ics are part of a whole development and product ecosystem available from on semiconductor for any sigfox requirement. other parts of the ecosystem include ? ready to go development kit dvk ? sfeu ? [api] ? 1 ? gevk including a 2 year sigfox subscription ? sigfox ready ? certified reference design for the ax ? sfeu and ax ? sfeu ? api ics ? ax ? sf10 ? mini21 ? 868 ? b1 and ax ? sf10 ? ant21 ? 868 ? b1, sigfox compliant smt modules based on ax ? sfeu with 50 pads or chip antenna. not available for ax ? sfeu ? api general features ? qfn40 5 mm x 7 mm package ? supply range 1.8 v * ? 3.6 v ? ? 40 c to 85 c ? temperature sensor ? supply voltage measurements *the device is operational from 1.8 v to 3.6 v. however, a supply voltage below 2.0 v is considered an extreme condition. details see table 4. ? 10 gpio pins ? 4 gpio pins with selectable voltage measure functionality, differential (1 v or 10 v range) or single ended (1 v range) with 10 bit resolution ? 2 gpio pins with selectable sigma delta dac output functionality ? 2 gpio pins with selectable output clock ? 3 gpio pins selectable as spi master interface ? integrated rx/tx switching with differential antenna pins power consumption ? ultra ? low power consumption: ? charge required to send a sigfox oob packet at 14 dbm output power: 0.28 c ? deepsleep mode current: 100 na ? sleep mode current: 1.3 a ? standby mode current: 0.5 ma ? continuous radio rx ? mode at 869.525 mhz : 10 ma ? continuous radio tx ? mode at 868.130 mhz 19 ma @ 0 dbm 49 ma @ 14 dbm high performance narrow ? band sigfox rf transceiver ? receiver ? carrier frequency 869.525 mhz ? data ? rate 600 bps fsk ? sensitivity ? 126 dbm @ 600 bps, 869.525 mhz, gfsk ? 0 dbm maximum input power ? transmitter ? carrier frequency 868.13 mhz ? data ? rate 100 bps psk ? high efficiency, high linearity integrated power amplifier ? maximum output power 14 dbm ? power level programmable in 1 dbm steps applications sigfox networks up ? link and down ? link. www.onsemi.com
ax ? sfeu, ax ? sfeu ? api www.onsemi.com 2 block diagram figure 1. functional block diagram of the ax ? sfeu / ax ? sfeu ? api rx/tx switch and antenna interface transmit communication controller cpu program memory (flash) sigfox identity (id, pac) sigfox compliant ram power mode control adc gpio uart rf synthesis dac ax ? sfeu / ax ? sfeu ? api tcxo interface receive clkp clkn antp antn uartrx uarttx gpio[9:0] vdd_io vdd_ana gnd dedicated status outputs radio_led cpu_led tx_led rx_led vtcxo reset_n cal filt application (ax ? sfeu only)
ax ? sfeu, ax ? sfeu ? api www.onsemi.com 3 table 1. pin function descriptions symbol pin(s) type description vdd_ana 1 p analog power output, decouple to neighboring gnd gnd 2 p ground, decouple to neighboring vdd_ana antp 3 a differential antenna input/output antn 4 a differential antenna input/output nc 5 n do not connect gnd 6 p ground, decouple to neighboring vdd_ana vdd_ana 7 p analog power output, decouple to neighboring gnd gnd 8 p ground filt 9 a synthesizer filter l2 10 a must be connected to pin l1 l1 11 a must be connected to pin l2 nc 12 n do not connect gpio8 13 i/o/pu general purpose io gpio7 14 i/o/pu general purpose io, selectable spi functionality (miso) gpio6 15 i/o/pu general purpose io, selectable spi functionality (mosi) gpio5 16 i/o/pu general purpose io, selectable spi functionality (sck) gpio4 17 i/o/pu general purpose io, selectable dac functionality, selectable dock functionality cpu_led 18 o cpu activity indicator radio_led 19 o radio activity indicator vtcxo 20 o tcxo power gpio9 21 i/o/pu general purpose io, wakeup from deep sleep uarttx 22 o uart transmit uartrx 23 i/pu uart receive rx_led 24 o receive activity indicator tx_led 25 o transmit activity indicator nc 26 pd do not connect reset_n 27 i/pu optional reset pin. internal pull ? up resistor is permanently enabled, nevertheless it is recommended to connect this pin to vdd_io if it is not used. gnd 28 p ground vdd_io 29 p unregulated power supply gpio0 30 i/o/a/pu general purpose io, selectable adc functionality, selectable dac functionality, selectable clock functionality gpio1 31 i/o/a/pu general purpose io, selectable adc functionality gpio2 32 i/o/a/pu general purpose io, selectable adc functionality nc 33 n do not connect nc 34 n do not connect gpio3 35 i/o/a/pu general purpose io, selectable adc functionality vdd_io 36 p unregulated power supply cal 37 a connect to filt as shown in the application diagram nc 38 n connect to ground clkn 39 a tcxo interface
ax ? sfeu, ax ? sfeu ? api www.onsemi.com 4 table 1. pin function descriptions description type pin(s) symbol clkp 40 a tcxo interface gnd center pad p ground on center pad of qfn, must be connected a = analog input i = digital input signal o = digital output signal pu = pull ? up i/o = digital input/output signal n = not to be connected p = power or ground pd = pull ? down all digital inputs are schmitt trigger inputs, digital input and output levels are lvcmos/lvttl compatible. pins gpio[3:0] must not be driven above vdd_io, all other digital inputs are 5 v tolerant. all gpio pins and uartrx start up as input with pull ? up. for explanations on how to use the gpio pins, see chapter ?at commands?. table 2. pin possible gpio modes gpio0 0, 1, z, u, a, t gpio1 0, 1, z, u, a gpio2 0, 1, z, u, a gpio3 0, 1, z, u, a gpio4 0, 1, z, u, t gpio5 0, 1, z, u gpio6 0, 1, z, u gpio7 0, 1, z, u gpio8 0, 1, z, u gpio9 0, 1, z, u 0 = pin drives 1 = not to be connected z = pin is high impedance input u = pin is input with pull ? up a = pin is analog input t = pin is driven by clock or dac pinout drawing figure 2. pinout drawing (top view) ax ? sfeu / ax ? sfeu ? api qfn40 8 7 6 5 4 3 2 1 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 40 39 38 37 36 35 34 33 32 31 30 29 vdd_ana antp gnd antn nc gnd gnd vdd_ana filt clkp clkn nc cal vdd_io nc gpio0 vdd_io gnd reset_n gpio1 gpio2 nc gpio3 l2 l1 nc gpio8 gpio7 gpio6 gpio5 gpio4 cpu_led tx_led vtcxo gpio9 uarttx uartrx rxled txled nc
ax ? sfeu, ax ? sfeu ? api www.onsemi.com 5 specifications table 3. absolute maximum ratings symbol description condition min max units vdd_io supply voltage ? 0.5 5.5 v idd supply current 200 ma p tot total power consumption 800 mw p i absolute maximum input power at receiver input antp and antn pins in rx mode 10 dbm i i1 dc current into any pin except antp, antn ? 10 10 ma i i2 dc current into pins antp, antn ? 100 100 ma i o output current 40 ma v ia input voltage antp, antn pins ? 0.5 5.5 v input voltage digital pins ? 0.5 5.5 v v es electrostatic handling hbm ? 2000 2000 v t amb operating temperature ? 40 85 c t stg storage temperature ? 65 150 c t j junction temperature 150 c stresses exceeding those listed in the maximum ratings table may damage the device. if any of these limits are exceeded, device function ality should not be assumed, damage may occur and reliability may be affected. 1. exposure to absolute maximum rating conditions for extended periods may affect device reliability.
ax ? sfeu, ax ? sfeu ? api www.onsemi.com 6 dc characteristics table 4. supplies conditions for all current and charge values unless otherwise specified are for the hardware configuration described in the ax ? sfeu application note: sigfox compliant reference design. symbol description condition min typ max units t amb operational ambient temperature ? 40 27 85 c vdd io i/o and voltage regulator supply voltage 1.8* 3.0 3.6 v vdd io_r1 i/o voltage ramp for reset activation; note 1 ramp starts at vdd_io 0.1 v 0.1 v/ms vdd io_r2 i/o voltage ramp for reset activation; note 1 ramp starts at 0.1 v < vdd_io < 0.7 v 3.3 v/ms i ds deep sleep mode current at$p=2 100 na i slp sleep mode current at$p=1 1.3 a i stdby standby mode current note 3 0.5 ma i rx_cont current consumption continuous rx at$sr=1,1, ? 1 10 ma q sfx_oob_0 charge to send a sigfox out of band message, 0 dbm at$s0 0.12 c q sfx_bit_0 charge to send a bit, 0 dbm at$sb=0 0.08 c q sfx_bitdl_0 charge to send a bit with downlink receive, 0 dbm at$sb=0,1 0.27 c q sfx_lfr_0 charge to send the longest possible sigfox frame (12 byte) , 0dbm at$sf=00112233445566778899aabb 0.14 c q sfx_lfrdl_0 charge to send the longest possible sigfox frame (12 byte) with downlink receive, 0 dbm at$sf=00112233445566778899aabb,1 0.27 c q sfx_oob_14 charge to send a sigfox out of band message, 14 dbm at$s0 0.28 c q sfx_bit_14 charge to send a bit, 14 dbm at$sb=0 0.20 c q sfx_bitdl_14 charge to send a bit with downlink receive, 14 dbm at$sb=0,1 0.35 c q sfx_lfr_14 charge to send the longest possible sigfox frame (12 byte) , 14 dbm at$sf=00112233445566778899aabb 0.39 c q sfx_lfrdl_14 charge to send the longest possible sigfox frame (12 byte) with downlink receive, 14 dbm at$sf=00112233445566778899aabb,1 0.46 c i txmod0avg modulated transmitter current, note 2 pout=0 dbm; average 19.0 ma i txmod14avg modulated transmitter current, note 2 pout=14 dbm; average 49.0 ma *the device is operational from 1.8 v to 3.6 v. however, a supply voltage below 2.0 v is considered an extreme condition and op eration can lead to reduced output power and increased spurious emission. 1. if vdd_io ramps cannot be guaranteed, an external reset circuit is recommended, see the ax8052 application note: power on res et 2. the output power of the ax ? sfeu / ax ? sfeu ? api can be programmed in 1 db steps from 0 dbm ? 14 dbm. current consumption values are given for a matching network that is optimized for 14 dbm output. 0 dbm transmission with typically 10 ma can be achieved w ith other networks that are optimized for 0 dbm operation. 3. internal 20 mhz iscillator, voltage conditioning and supervisory circuit running.
ax ? sfeu, ax ? sfeu ? api www.onsemi.com 7 typical current waveform figure 3. typical current waveform for a maximum length frame with downlink receive at 14 dbm output power typical current waveform ? maximum length frame with downlink receive, pout = 14 dbm time [s] 20 10 30 40 0 10 0 20 30 40 50 60 current [ma] battery life examples scenario 1: ? cr2032 coin cell battery ? one oob frame transmitter per day at pout=0 dbm ? device in sleep ? neglecting battery self discharge cr2032 capacity 225 mah * 3600 s/h 810 c sleep charge per day 1.3 a * 86400 s 0.11 c/day oob frame transmission 0.12 c/day total charge consumption 0.23 c/day battery life 9.6 years scenario 2: ? 2 aaa alkaline batteries in series ? one oob frame transmitter per day at pout=14 dbm ? four maximum length frames with downlink receive per day at pout=14 dbm ? device in sleep ? neglecting battery self discharge 2 aaa alkaline capacity 1500 mah * 3600 s/h 5400 c sleep charge per day 1.3 a * 86400 s 0.11 c/day oob frame transmission 0.28 c/day frame transmission with downlink 4 * 0.46 c/day 1.84 c/day total charge consumption 2.26 c/day battery life 6.5 years
ax ? sfeu, ax ? sfeu ? api www.onsemi.com 8 table 5. logic symbol description condition min typ max units digital inputs v t+ schmitt trigger low to high threshold point vdd_io = 3.3 v 1.55 v v t ? schmitt trigger high to low threshold point 1.25 v v il input voltage, low 0.8 v v ih input voltage, high 2.0 v v ipa input voltage range, gpio[3:0] ? 0.5 vdd_io v v ipbc input voltage range, gpio[9:4], uartrx ? 0.5 5.5 v i l input leakage current ? 10 10 a r pu programmable pull ? up resistance 65 k digital outputs i oh output current, high ports gpio[9:0], uarttx, txled, rxled, txled, cpuled v oh = 2.4 v 8 ma i ol output current, low gpio[9:0], uarttx, txled, rxled, txled, cpuled v ol = 0.4 v 8 ma i oz tri ? state output leakage current ? 10 10 a ac characteristics table 6. tcxo reference input symbol description condition min typ max units f tcxo tcxo frequency a passive network between the tcxo output and the pins clkp and clkn is required. for detailed tcxo network recommendations depending on the tcxo output swing refer to the ax5043 application note: use with a tcxo reference clock. for tcxo recommendations see the ax ? sfeu application note: sigfox compliant reference design 48 mhz table 7. transmitter conditions for transmitter specifications unless otherwise specified with the antenna network from ax ? sfeu application note: sigfox compliant reference design and at 868.130 mhz. symbol description condition min typ max units sbr signal bit rate 100 bps ptx min lowest transmitter output power at$cw=868130000,1,0 0 dbm ptx max highest transmitter output power at$cw=868130000,1,14 14 dbm ptx step programming step size output power 1 db dtx temp transmitter power variation vs. temperature ? 40 c to +85 c 0.5 db dtx vdd transmitter power variation vs. vdd_io 1.8 to 3.6 v 0.5 db ptx harm2 emission @ 2 nd harmonic ? 51 dbc ptx harm3 emission @ 3 rd harmonic ? 63 ptx harm4 emission @ 4 th harmonic ? 84
ax ? sfeu, ax ? sfeu ? api www.onsemi.com 9 figure 4. typical spectrum with harmonics at 14 dbm output power table 8. receiver conditions for transmitter specifications unless otherwise specified with the antenna network from ax ? sfeu application note: sigfox compliant reference design and at 869.525 mhz. symbol description condition min typ max units sbr signal bit rate 600 bps is ber868 at$sb=x,1, at$sf=x,1, at$sr per < 0.1 ? 126 dbm blk 868 blocking at 10 mhz offset channel/blocker @ per = 0.1, wanted signal level is +3 db above the typical sensitivity, the blocker signal is cw 78 db
ax ? sfeu, ax ? sfeu ? api www.onsemi.com 10 table 9. adc / temperature sensor symbol description condition min typ max units adcres adc resolution 10 bits v adcref adc reference voltage 0.95 1 1.05 v z adc00 input capacitance 2.5 pf dnl differential nonlinearity 1 lsb inl integral nonlinearity 1 lsb off offset 3 lsb gain_err gain error 0.8 % adc in differential mode v abs_diff absolute voltages & common mode voltage in differential mode at each input 0 vdd_io v v fs_diff01 full swing input for differential signals gain x1 ? 500 500 mv v fs_diff10 gain x10 ? 50 50 mv adc in single ended mode v mid_se mid code input voltage in single ended mode 0.5 v v in_se00 input voltage in single ended mode 0 vdd_io v v fs_se01 full swing input for single ended signals gain x1 0 1 v temperature sensor t rng temperature range at$t? ? 40 85 c t err_cal temperature error at$t? ? 2 2 c
ax ? sfeu, ax ? sfeu ? api www.onsemi.com 11 command interface general information the chapter ?command interface? is a documentation of the at ? command set for devices which do not have an api ? interface. to see whether the device is capable of receiving at ? commands, please refer to chapter ?part numbers?. if the device has been shipped with the api ? interface, please refer to the sw manual and ?apiexample? code delivered with ax ? sf ? lib ? 1 ? gevk for an introduction on how to setup a project and how to use the api ? interface. serial parameters: 9600, 8, n, 1 the ax ? sfeu uses the uart (pins uarttx, uartrx) to communicate with a host and uses a bitrate of 9600 baud , no parity, 8 data bits and one stop bit. power modes standby after power ? up and after finishing a sigfox transmission, ax ? sfeu enters standby mode. in standby mode, ax ? sfeu listens on the uar t for commands from the host. also, oob frames are transmitted whenever the oob timer fires. to conserve power, the ax ? sfeu can be put into sleep or turned off (deep sleep) completely. sleep the command at$p=1 is used to put the ax ? sfeu into sleep mode. in this mode, only the wakeup timer for out ? of ? band messages is still running. to wake the ax ? sfeu up from sleep mode toggle the serial uartrx pin, e.g. by sending a break (break is an rs232 framing violation, i.e. at least 10 bit durations low). when an out of band (oob) message is due, ax ? sfeu automatically wakes up to transmit the message, and then returns to sleep mode. deep sleep in deep sleep mode, the ax ? sigfox is completely turned off and only draws negligible leakage current. deep sleep mode can be activated with at$p=2 . to wake ? up from deep sleep mode, gpio9 is pulled to gnd. when using deep sleep mode, keep two things in mind: everything is turned off, timers are not running at all and all settings will be lost (use at$wr to save settings to flash before entering deep sleep mode). out ? of ? band messages will therefore not be sent. the pins states are frozen in deep sleep mode. the user must ensure that this will not result in condition which would draw a lot of current. at commands numerical syntax hexdigit ::= [0 ? 9a ? fa ? f] hexnum ::= ?0x? hexdigit+ decnum ::= ?0? | [1 ? 9] [0 ? 9]* octnum ::= ?0? [0 ? 7]+ binnum ::= ?0b? [01]+ bit ::= [01] optnum ::= ? ? 1? frame ::= (hexdigit hexdigit)+ uint ::= hexnum | decnum | octnum | binnum uint_opt ::= uint | optnum command syntax a command starts with ?at? (everything is case sensitive!), continues with the actual command followed by parameters (if any) and ends with any kind of whitespace (space, tab, newline etc.) if incorrect syntax is detected (?parsing error?) all input is ignored up until the next whitespace character. also note that any number can be entered in any format (hexadecimal, decimal, octal and binary) by adding the corresponding prefix (?0x?, ?0?, ?0b?). the only exception is the ?send frame? command ( at$sf ) which expects a list of hexadecimal digits without any prefix. return codes a successful command execution is indicated by sending ?ok?. if a command returns a value (e.g. by querying a register) only the value is returned. examples bold text is sent to ax ? sfeu. at$i=0 axsem at command interface here, we execute command ?i? to query some general information. at$sf=aabb1234 ok this sends a sigfox frame containing { 0x00 : 0x11 : 0x22 : 0x33 : 0x44 }, then waits for a downlink response telegram, which in this example contains { 0xaa : 0xbb : 0xcc : 0xdd }.
ax ? sfeu, ax ? sfeu ? api www.onsemi.com 12 at$cb=0011223344,1 ok rx=aa bb cc dd this sends a sigfox frame containing { 0xaa : 0xbb : 0x12 : 0x34 } without waiting for a response telegram. at$cb=0xaa,1 ok the ?cb? command sends out a continuous pattern of bits, in this case 0xaa = 0b10101010. at$p=1 ok this transitions the device into sleep mode. out ? of ? band transmissions will still be triggered. the uart is powered down. the device can be woken up by a low level on the uart signal, i.e. by sending break. table 10. commands command name description at dummy command just returns ?ok? and does nothing else. can be used to check com- munication. at$sb=bit[,bit] send bit send a bit status (0 or 1). optional bit flag indicates if ax ? sfeu should receive a downlink frame. at$sf=frame[,bit] send frame send payload data, 1 to 12 bytes. optional bit flag indicates if ax ? sfeu should receive a downlink frame. at$so manually send out of band message send the out ? of ? band message. at$tr? get the transmit repeat returns the number of transmit repeats. default: 2 at$tr=? get transmit range returns the allowed range of transmit repeats. at$tr=uint get transmit repeat sets the transmit repeat. atsuint? get register query a specific configuration register?s value. see chapter ?registers? for a list of registers. atsuint=uint set register change a configuration register. atsuint=? get register range returns the allowed range of transmit repeats. at$if=uint set tx frequency set the output carrier macro channel for sigfox frames. at$if? get tx frequency get the currently chosen tx frequency. at$dr=uint set rx frequency set the reception carrier macro channel for sigfox frames. at$dr? get rx frequency get the currently chosen rx frequency. at$cw=uint,bit[,uint_opt] continuous wave to run emission tests for sigfox certification it is necessary to send a continuous wave, i.e. just the base frequency without any modula- tion. parameters: name range description frequency 800000000 ? continuous wave frequency in hz. 999999999, 0 use 868130000 for sigfox or 0 to keep previous frequency. mode 0, 1 enable or disable carrier wave. power 0 ? 14 dbm of signal | default: 14 at$cb=uint_opt,bit test mode: tx constant byte for emission testing it is useful to send a specific bit pattern. the first parameter specifies the byte to send. use ? ? 1? for a (pseudo ? )random pattern. parameters: name range decsription pattern 0 ? 255, ? 1 byte to send. use ? ? 1? for a (pseudo ? )random pattern. mode 0, 1 enable or disable pattern test mode. at$t? get temperature measure internal temperature and return it in 1/10 th of a degree celsius. at$v? get voltages return current voltage and voltage measured during the last transmission in mv.
ax ? sfeu, ax ? sfeu ? api www.onsemi.com 13 table 10. commands command description name at$i=uint information display various product information: 0: software name & version example response: ax ? sfeu 1.0.6 ? etsi 1: contact details example response: support@axsem.com 2: silicon revision lower byte example response: 8f 3: silicon revision upper byte example response: 00 4: major firmware version example response: 1 5: minor firmware version example response: 0 7: firmware variant (frequency band etc. (eu/us)) example response: etsi 8: firmware vcs version example response: v1.0.2 ? 36 9: sigfox library version example response: dl0 ? 1.4 10: device id example response: 00012345 11: pac example response: 0123456789abcdef at$p=uint set power mode to conserve power, the ax ? sfeu can be put to sleep manually. depending on power mode, you will be responsible for waking up the ax ? sfeu again! 0: software reset (settings will be reset to values in flash) 1: sleep (send a break to wake up) 2: deep sleep (toggle gpio9 or reset_n pin to wake up; the ax ? sfeu is not running and all settings will be reset!) at$wr save config write all settings to flash (rx/tx frequencies, registers) so they survive reset/deep sleep or loss of power. use at$p=0 to reset the ax ? sfeu and load settings from flash. at:pn? get gpio pin return the setting of the gpio pin n ; n can range from 0 to 9. a character string is returned describing the mode of the pin, fol- lowed by the actual value. if the pin is configured as analog pin, then the voltage (range 0 ? 1 v) is returned. the mode characters have the following meaning: mode description 0 pin drives low 1 pin drives high z pin is high impedance input u pin is input with pull ? up a pin is analog input (gpio pin 0 ? 3 only) t pin is driven by clock or dac (gpio pin 0 and 4 only) the default mode after exiting reset is u on all gpio pins. at:pn=? get gpio pin range print a list of possible modes for a pin. the table below lists the response. pin modes p0 0, 1, z, u, a, t p1 0, 1, z, u, a p2 0, 1, z, u, a p3 0, 1, z, u, a p4 0, 1, z, u, t p5 0, 1, z, u p6 0, 1, z, u p7 0, 1, z, u p8 0, 1, z, u p9 0, 1, z, u at:pn=mode set gpio pin set the gpio pin mode. for a list of the modes see the command at:pn?
ax ? sfeu, ax ? sfeu ? api www.onsemi.com 14 table 10. commands command description name at:adc pn[ ? pn[(1v|10v)]]? get gpio pin analog voltage measure the voltage applied to a gpio pin. the command also allows measurement of the voltage difference across two gpio pins. in differential mode, the full scale range may also be specified as 1 v or 10 v. note however that the pin input voltages must not exceed the range 0..vdd_io. the command returns the result as fraction of the full scale range (1 v if none is specified). the gpio pins referenced should be initialized to analog mode before issuing this command. at:spi[(a|b|c|d)]=bytes spi transaction this command clocks out bytes on the spi port. the clock frequency is 312.5 khz. the command returns the bytes read on miso during out- put. optionally the clocking mode may be specified (default is a): mode clock inversion clock phase a normal normal b normal alternate c inverted normal d inverted alternate note that sel, if needed, is not generated by this command, and must instead be driven using standard gpio commands (at:pn=0|1). at:clk=freq,reffreq set clock generator output a square wave on the pin(s) set to t mode. the frequency of the square wave is (freq / 2 16 ) reffreq. possible values for reffreq are 20000000, 10000000, 5000000, 2500000, 1250000, 625000, 312500, 156250. possible values if freq are 0 ? 65535. at:clk=off turn off clock generator switch off the clock generator at:clk? get clock generator return the settings of the clock generator. two numbers are returned, freq and reffreq. at:dac=value set dac output a dac value on the pin(s) set to t mode. parameter value may be in the range ? 32768 ? 32767. the average output voltage is (1/2 + value / 2 17 ) vdd. an external low pass filter is needed to get smooth output voltages. the modulation frequency is 20 mhz. a possible low pass filter choice is a simple rc low pass filter with r = 10 k and c = 1 f. at:dac=off turn off dac switch off the dac at:dac? get dac return the dac value
ax ? sfeu, ax ? sfeu ? api www.onsemi.com 15 table 10. commands command description name at$tm=mode,config activates the sigfox testmode available test modes: 0. tx bpsk send only bpsk with synchro bit + synchro frame + pn sequence: no hopping centered on the tx_frequency. config bits 0 to 6 define the number of repetitions. bit 7 of config defines if a delay is applied of not in the loop 1. tx protocol: tx mode with full protocol with sigfox key: send sigfox protocol frames with initiate downlink flag = true. config defines the number of repetitions. 2. rx protocol: this mode tests the complete downlink protocol in downlink only. config defines the number of repetitions. 3. rx gfsk: rx mode with known pattern with sb + sf + pattern on rx_frequency (internal comparison with received frame ? known pattern = aa aa b2 27 1f 20 41 84 32 68 c5 ba ae 79 e7 f6 dd 9b. config defines the number of repetitions. config defines the number of repetitions. 4. rx sensitivity: does uplink + downlink frame with sigfox key and specific timings. this test is specific to sigfox?s test equipments & softwares. 5. tx synthesis: does one uplink frame on each sigfox channel to measure frequency synthesis step at$se starts at$tm ? 3,255 indefinitely convenience command for sensitivity tests at$sl[=frame] send local loop sends a local loop frame with optional payload of 1 to 12 bytes. default payload: 0x84, 0x32, 0x68, 0xc5, 0xba, 0x53, 0xae, 0x79, 0xe7, 0xf6, 0xdd, 0x9b. at$rl receive local loop starts listening for a local loop. table 11. registers number name description default range units 300 out of band period ax ? sfeu sends periodic static messages to indicate that they are alive. set to 0 to disable. 24 0 ? 24 hours 302 power level the output power of the radio. 14 0 ? 14 dbm
ax ? sfeu, ax ? sfeu ? api www.onsemi.com 16 application information typical application diagrams typical ax ? sfeu / ax ? sfeu ? api application diagram figure 5. typical application diagram for detailed application configuration and bom see the ax ? sfeu application note: sigfox compliant reference design.
ax ? sfeu, ax ? sfeu ? api www.onsemi.com 17 qfn40 package information qfn40 7x5, 0.5p case 485eg issue a seating note 4 0.15 c (a3) a a1 d2 b 1 21 40 2x 2x e2 40x 9 l 40x bottom view detail a top view side view d a b e 0.15 c pin one reference 0.10 c 0.08 c c 29 e a 0.10 b c 0.05 c notes: 1. dimensioning and tolerancing per asme y14.5m, 1994. 2. controlling dimensions: millimeters. 3. dimension b applies to plated terminal and is measured between 0.25 and 0.30mm from terminal 4. coplanarity applies to the exposed pad as well as the terminals. dim min max millimeters a 0.80 1.00 a1 0.00 0.05 a3 0.20 ref b 0.18 0.30 d 7.00 bsc d2 5.30 5.50 e 5.00 bsc 3.50 e2 3.30 e 0.50 bsc l 0.30 0.50 l1 ??? 0.15 plane *for additional information on our pb ? free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. soldering footprint* e/2 note 3 dimensions: millimeters 0.50 5.60 0.32 3.60 40x 0.60 40x 5.30 7.30 1 pitch package outline recommended l1 detail a l alternate terminal constructions l ??
ax ? sfeu, ax ? sfeu ? api www.onsemi.com 18 qfn40 soldering profile figure 6. qfn40 soldering profile preheat reflow cooling t p t l t smax t smin t s t l t p t 25 c to peak temperature time 25 c table 12. profile feature pb ? free process average ramp ? up rate 3 c/s max. preheat preheat temperature min t smin 150 c temperature max t smax 200 c time (t smin to t smax ) t s 60 ? 180 sec time 25 c to peak temperature t 25 c to peak 8 min max. reflow phase liquidus temperature t l 217 c time over liquidus temperature t l 60 ? 150 s peak temperature t p 260 c time within 5 c of actual peak temperature t p 20 ? 40 s cooling phase ramp ? down rate 6 c/s max. 1. all temperatures refer to the top side of the package, measured on the the package body surface.
ax ? sfeu, ax ? sfeu ? api www.onsemi.com 19 qfn40 recommended pad layout 1. pcb land and solder masking recommendations are shown in figure 7. figure 7. pcb land and solder mask recommendations a = clearance from pcb thermal pad to solder mask opening, 0.0635 mm minimum b = clearance from edge of pcb thermal pad to pcb land, 0.2 mm minimum c = clearance from pcb land edge to solder mask opening to be as tight as possible to ensure that some solder mask remains between pcb pads. d = pcb land length = qfn solder pad length + 0.1 mm e = pcb land width = qfn solder pad width + 0.1 mm 2. thermal vias should be used on the pcb thermal pad (middle ground pad) to improve thermal conductivity from the device to a copper ground plane area on the reverse side of the printed circuit board. the number of vias depends on the package thermal requirements, as determined by thermal simulation or actual testing. 3. increasing the number of vias through the printed circuit board will improve the thermal conductivity to the reverse side ground plane and external heat sink. in general, adding more metal through the pc board under the ic will improve operational heat transfer, but will require careful attention to uniform heating of the board during assembly. assembly process stencil design & solder paste application 1. stainless steel stencils are recommended for solder paste application. 2. a stencil thickness of 0.125 ? 0.150 mm (5 ? 6 mils) is recommended for screening. 3. for the pcb thermal pad, solder paste should be printed on the pcb by designing a stencil with an array of smaller openings that sum to 50% of the qfn exposed pad area. solder paste should be applied through an array of squares (or circles) as shown in figure 8. 4. the aperture opening for the signal pads should be between 50 ? 80% of the qfn pad area as shown in figure 9. 5. optionally, for better solder paste release, the aperture walls should be trapezoidal and the corners rounded. 6. the fine pitch of the ic leads requires accurate alignment of the stencil and the printed circuit board. the stencil and printed circuit assembly should be aligned to within + 1 mil prior to application of the solder paste. 7. no ? clean flux is recommended since flux from underneath the thermal pad will be difficult to clean if water ? soluble flux is used. figure 8. solder paste application on exposed pad
ax ? sfeu, ax ? sfeu ? api www.onsemi.com 20 figure 9. solder paste application on pins minimum 50% coverage 62% coverage maximum 80% coverage life support applications this product is not designed for use in life support appliances, devices, or in systems where malfunction of this product can reasonably be expected to result in personal injury. on semiconductor customers using or selling this product for use in such applications do so at their own risk and agree to fully indemnify on semiconductor for any damages resulting from such improper use or sale. device information the following device information can be queried using the at ? commands a t$i=4, at$i=5 for the app version and at$i=2, at$i=3 for the chip version. table 13. device versions product part number app version chip version [0] [1] [0] [1] ax ? sfeu ax ? sfeu ? 1 ? 01 ? xxxx 1 0x01 0x01 0x8f 0x51 ax ? sfeu ? api ax ? sfeu ? api ? 1 ? 01 ? xxxx 1 0x01 0x01 0x8f 0x51 1. tb05 for reel 500, tx30 for reel 3000 reel on semiconductor and the are registered trademarks of semiconductor components industries, llc (scillc) or its subsidia ries in the united states and/or other countries. scillc owns the rights to a number of pa tents, trademarks, copyrights, trade secret s, and other intellectual property. a listin g of scillc?s product/patent coverage may be accessed at www.onsemi.com/site/pdf/patent ? marking.pdf. scillc reserves the right to make changes without further notice to any products herein. scillc makes no warrant y, representation or guarantee regarding the suitability of it s products for any particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ?typi cal? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. all operating param eters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the right s of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgic al implant into the body, or other applications intended to s upport or sustain life, or for any other application in which the failure of the scillc product could create a situation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer s hall indemnify and hold scillc and its officers , employees, subsidiaries, affiliates, and dist ributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufac ture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. publication ordering information n. american technical support : 800 ? 282 ? 9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81 ? 3 ? 5817 ? 1050 ax ? sfeu/d sigfox and sigfox ready are registered trademarks of sigfox sarl. literature fulfillment : literature distribution center for on semiconductor 19521 e. 32nd pkwy, aurora, colorado 80011 usa phone : 303 ? 675 ? 2175 or 800 ? 344 ? 3860 toll free usa/canada fax : 303 ? 675 ? 2176 or 800 ? 344 ? 3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your local sales representative

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